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DataSheet
POWER MANAGEMENT
The ADE7868 / ADE7878 have four modes of operation, deter-
mined by the state of the PM0 and PM1 pins (see Table 9). The
ADE7878 operation and can easily be connected to an external
microprocessor I/O. The PM0 and PM1 pins have internal pull-
up resistors. See Table 11 and Table 12 for a list of actions that are
recommended before and after setting a new power mode.
Table 9. Power Supply Modes
Power Supply Modes PM1 PM0
PSM0, Normal Power Mode 0 1
PSM1, Reduced Power Mode 1 0 0
PSM2, Low Power Mode 1 1 0
PSM3, Sleep Mode 1 1
1
PSM0—NORMAL POWER MODE (ALL PARTS)
are fully functional. The PM0 pin is set to high and the PM1 pin
is set to low for the ADE78xx to enter this mode. If the ADE78xx
is in one of PSM1, PSM2, or PSM3 modes and is switched into
PSM0 mode, then all control registers take the default values with
the exception of the threshold register, LPOILVL, which is used
in PSM2 mode, and the CONFIG2 register, both of which
maintain their values.
The ADE7854 / ADE7858 / ADE7868 / ADE7878 signal the end of
the transition period by triggering the IRQ1 interrupt pin low and
setting Bit 15 (RSTDONE) in the STATUS1 register to 1. This bit is
0 during the transition period and becomes 1 when the transition is
finished. The status bit is cleared and the IRQ1 pin is set back to
high by writing to the STATUS1 register with the corresponding
bit set to 1. Bit 15 (RSTDONE) in the interrupt mask register
does not have any functionality attached even if the IRQ1 pin goes
low when Bit 15 (RSTDONE) in the STATUS1 register is set to 1.
This makes the RSTDONE interrupt unmaskable.
ADE7854/ADE7858/ADE7868/ADE7878
In summary, in this mode, it is not recommended to access any
register other than AIMAV, BIMAV, and CIMAV. The circuit
that measures these estimates of rms values is also active during
PSM0; therefore, its calibration can be completed in either PSM0
mode or in PSM1 mode. Note that the ADE7868 and ADE7878
do not provide any register to store or process the corrections
resulting from the calibration process. The external microprocessor
stores the gain values in connection with these measurements
more details on the xIMAV registers).
The 20-bit mean absolute value measurements done in PSM1,
although available also in PSM0, are different from the rms
measurements of phase currents and voltages executed only in
PSM0 and stored in the xIRMS and xVRMS 24-bit registers.
If the ADE7868 / ADE7878 is set in PSM1 mode while still in the
PSM0 mode, the ADE7868 / ADE7878 immediately begin the
mean absolute value calculations without any delay. The xIMAV
registers are accessible at any time; however, if the ADE7878 or
ADE7868 is set in PSM1 mode while still in PSM2 or PSM3
modes, the ADE7868 / ADE7878 signal the start of the mean
absolute value computations by triggering the IRQ1 pin low.
The xIMAV registers can be accessed only after this moment.
ONLY)
The low power mode, PSM2, is available on the ADE7868 and
ADE7878 only. In this mode, the ADE7868 / ADE7878 compare
all phase currents against a threshold for a period of 0.02 ×
(LPLINE[4:0] + 1) seconds, independent of the line frequency.
Table 10. LPOILVL Register
Bit Mnemonic Default Description
ADE7878 ONLY)
The reduced power mode, PSM1, is available on the ADE7868
[2:0]
[7:3]
LPOIL[2:0]
LPLINE[4:0]
111
00000
Threshold is put at a value
corresponding to full scale
multiplied by LPOIL/8.
The measurement period is
(LPLINE[4:0] + 1)/50 sec.
measure the mean absolute values (mav) of the 3-phase currents
and store the results in the AIMAV, BIMAV, and CIMAV 20-bit
registers. This mode is useful in missing neutral cases in which
the voltage supply of the ADE7868 or ADE7878 is provided by an
external battery. The serial ports, I 2 C or SPI, are enabled in this
mode; the active port can be used to read the AIMAV, BIMAV,
and CIMAV registers. It is not recommended to read any of the
other registers because their values are not guaranteed in this
mode. Similarly, a write operation is not taken into account by
the ADE7868 / ADE7878 in this mode.
Rev. H | Page 23 of 100
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